Techniques for algorithm design on the instruction systolic array

Techniques for algorithm design on the instruction systolic array

Instruction systolic arrays (ISAs) provide a programmable high performance hardware for specific computationally intensive applications. Typically, such an array is connected to a sequential host, thus operating like a coprocessor which solves only the computationally intensive tasks within a global...

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Bibliographic Details
Main Author: Bertil Schmidt
Format: Default Thesis
Published: 1999
Subjects:
Other information and computing sciences not elsewhere classified
Parallel computing
Image processing
ISA
Instruction Systolic Array
Cryptography
Algorithm design
Systola 1024
Information and Computing Sciences not elsewhere classified
Online Access:https://hdl.handle.net/2134/7161
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https://hdl.handle.net/2134/7161

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