An instruction systolic array architecture for multiple neural network types

An instruction systolic array architecture for multiple neural network types

Modern electronic systems, especially sensor and imaging systems, are beginning to incorporate their own neural network subsystems. In order for these neural systems to learn in real-time they must be implemented using VLSI technology, with as much of the learning processes incorporated on-chip as i...

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Bibliographic Details
Main Author: Andrew Kane
Format: Default Thesis
Published: 1998
Subjects:
Other information and computing sciences not elsewhere classified
Systolic array
Instruction systolic array
Systolic algorithm design
Parallel processing
Computer architecture
Neural networks
Backpropagation
Kohonen
Counter-propagation
Information and Computing Sciences not elsewhere classified
Online Access:https://hdl.handle.net/2134/16031
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https://hdl.handle.net/2134/16031

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