Gate-all-around junctionless silicon transistors with atomically thin nanosheet channel (0.65 nm) and record sub-threshold slope (43 mV/dec)

A silicon junctionless (JL) trench gate-all-around (GAA) nanowire field-effect transistor with an atomically thin channel thickness of 0.65 nm and a very thin oxide with a thickness of 12.3 nm are demonstrated experimentally. Experimental results indicate that this device with a channel thickness of...

Full description

Saved in:
Bibliographic Details
Published in:Applied physics letters 2017-01, Vol.110 (3)
Main Authors: Thirunavukkarasu, Vasanthan, Jhan, Yi-Ruei, Liu, Yan-Bo, Kurniawan, Erry Dwi, Lin, Yu Ru, Yang, Shang-Yi, Cheng, Che-Hsiang, Wu, Yung-Chun
Format: Article
Language:English
Subjects:
Applied physics
Field effect transistors
Nanosheets
Nanowires
Quantum transport
Quantum tunnelling
Semiconductor devices
Silicon transistors
Threshold voltage
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A silicon junctionless (JL) trench gate-all-around (GAA) nanowire field-effect transistor with an atomically thin channel thickness of 0.65 nm and a very thin oxide with a thickness of 12.3 nm are demonstrated experimentally. Experimental results indicate that this device with a channel thickness of 0.65 nm achieves a sub-threshold slope (SS) of 43 mV/decade, which is the best yet achieved by any reported JLFET. Owing to the atomically thin channel, this device has an extremely high ION/IOFF current ratio of >108. Furthermore, the atomically thin channel GAA JLFET exhibits a low threshold voltage (VTH) variation and negligible drain-induced barrier lowering (DIBL 
ISSN:0003-6951
1077-3118
DOI:10.1063/1.4974255