Linearized Dual-Band Power Amplifiers With Integrated Baluns in 65 nm CMOS for a 2 × 2 802.11n MIMO WLAN SoC

Fully integrated dual-band power amplifiers with on-chip baluns for 802.11n MIMO WLAN applications are presented. With a 3.3 V supply, the PAs produce a saturated output power of 28.3 dBm and 26.7 dBm with peak drain efficiency of 35.3% and 25.3% for the 2.4 GHz and 5 GHz bands, respectively. By uti...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2010-05, Vol.45 (5), p.955-966
Main Authors: AFSAHI, Ali, BEHZAD, Arya, MAGOON, Vikram, LARSON, Lawrence E
Format: Article
Language:English
Subjects:
Amplifiers
Applied sciences
Baluns
Bands
Circuit properties
CMOS
Design. Technologies. Operation analysis. Testing
Drains
Electric, optical and optoelectronic circuits
Electrical engineering. Electrical power engineering
Electronic circuits
Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
Electronics
Exact sciences and technology
Integrated circuits
Local area networks
Noise levels
Power amplifiers
Power electronics, power supplies
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Wireless communication
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Summary:Fully integrated dual-band power amplifiers with on-chip baluns for 802.11n MIMO WLAN applications are presented. With a 3.3 V supply, the PAs produce a saturated output power of 28.3 dBm and 26.7 dBm with peak drain efficiency of 35.3% and 25.3% for the 2.4 GHz and 5 GHz bands, respectively. By utilizing multiple fully self-contained linearization algorithms, an EVM of - 25 dB is achieved at 22.4 dBm for the 2.4 GHz band and 20.5 dBm for the 5 GHz band while transmitting 54 Mbs OFDM. The chip is fabricated in standard 65 nm CMOS and the PAs occupy 0.31 mm 2 (2.4 GHz) and 0.27 mm 2 (5 GHz) area. To examine the reliability of the PAs, accelerated aging tests are performed for several hundreds parts without a single failure.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2010.2041401