Noise considerations in circuit optimization

Noise can cause digital circuits to switch incorrectly, producing spurious results. It can also have adverse power, timing and reliability effects. Dynamic logic is particularly susceptible to charge-sharing and coupling noise. Thus, the design and optimization of a circuit should take noise conside...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 2000-06, Vol.19 (6), p.679-690
Main Authors: Visweswariah, C., Haring, R.A., Conn, A.R.
Format: Article
Language:English
Subjects:
Adjoints
Circuit noise
Circuit optimization
Circuits
Coupling circuits
Design engineering
Digital circuits
Logic
Mathematical models
Noise
Optimization
Optimization methods
Studies
Switches
Switching circuits
Time domain analysis
Timing
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Summary:Noise can cause digital circuits to switch incorrectly, producing spurious results. It can also have adverse power, timing and reliability effects. Dynamic logic is particularly susceptible to charge-sharing and coupling noise. Thus, the design and optimization of a circuit should take noise considerations into account. Such considerations are typically stated as semi-infinite constraints in the time-domain. Semi-infinite problems are generally harder to solve than standard nonlinear optimization problems. Moreover, the number of noise constraints can potentially be very large. This paper describes a novel and practical method for incorporating realistic noise considerations during automatic circuit optimization by representing semi-infinite constraints as ordinary equality constraints involving time integrals. Using an augmented Lagrangian optimization merit function, the adjoint method is applied to compute all the gradients required for optimization in a single adjoint analysis, no matter how many noise measurements are considered and irrespective of the dimensionality of the problem. Thus, for the first time, a method is described to practically accommodate a large number of noise considerations during circuit optimization. The technique has been applied to optimization using time-domain simulation, but could be applied in the future to optimization on a static-timing basis. Numerical results are presented.
ISSN:0278-0070
1937-4151
DOI:10.1109/43.848089