High-performance implanted base silicon bipolar technology for RF applications

A 0.4 /spl mu/m silicon bipolar technology for mixed digital/analog RF-applications is described. Without increasing the process complexity in comparison to current production technologies transit frequencies of 52 GHz, maximum oscillation frequencies of 65 GHz and minimum noise figures of 0.7 and 1...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on electron devices 2001-11, Vol.48 (11), p.2514-2519
Main Authors: Bock, J., Knapp, H., Aufinger, K., Meister, T.F., Wurzer, M., Boguth, S., Treitinger, L.
Format: Article
Language:English
Subjects:
Delay
Devices
Logic
Noise levels
Oscillations
Oscillators
Silicon
Transit
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A 0.4 /spl mu/m silicon bipolar technology for mixed digital/analog RF-applications is described. Without increasing the process complexity in comparison to current production technologies transit frequencies of 52 GHz, maximum oscillation frequencies of 65 GHz and minimum noise figures of 0.7 and 1.3 dB at 3 and 6 GHz are achieved. Emitter-coupled logic (ECL) ring oscillators have a minimum gate delay of 12 ps, the low power capability of the technology is proven by a current-mode logic (CML) power delay product of 5.2 fJ and a dynamic frequency divider operates up to 52 GHz. These results demonstrate the suitability of this technology for mobile communications up to at least 6 GHz and for high-speed optical data links at 10 Gbit/s and above.
ISSN:0018-9383
1557-9646
DOI:10.1109/16.960376