Polarity-dependent device degradation in SONOS transistors due to gate conduction under nonvolatile memory operations

In order to explain polarity-dependent device degradation observed in polysilicon-oxide-nitride-oxide-silicon (SONOS) transistors, a physics-based model is proposed. Comparing the trends in polarity-dependent electrical characteristics between two different gate dielectric structures of stacked oxid...

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Bibliographic Details
Published in:IEEE transactions on device and materials reliability 2006-06, Vol.6 (2), p.334-342
Main Authors: Yi, J.-H., Shin, H., Park, Y.-J., Min, H.S.
Format: Magazinearticle
Language:English
Subjects:
Anodes
Charge carrier processes
Degradation
Devices
Dielectric devices
Dielectrics
Electric variables
Electron traps
gate conduction
Gates
hole fluence
negative bias temperature instability (NBTI)
Nonvolatile memory
nonvolatile memory (NVM)
Oxides
polarity dependence
polysilicon-oxide-nitride-oxide-silicon (SONOS)
Semiconductor devices
SONOS devices
Threshold voltage
Transistors
Tunneling
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Summary:In order to explain polarity-dependent device degradation observed in polysilicon-oxide-nitride-oxide-silicon (SONOS) transistors, a physics-based model is proposed. Comparing the trends in polarity-dependent electrical characteristics between two different gate dielectric structures of stacked oxide- nitride-oxide (ONO) and oxide alone (SiO 2 ), it was demonstrated that the bimodal behavior observed in SONOS transistors is due to the stacked gate dielectric structure and that the device degradation is caused not by electrons but by holes. The proposed model is based on two models of the anode hole injection with maximum available hole energy E max and the hydrogen-released interface trap generation. It is shown that the device degradation Delta * in the stacked-ONO gate structure can be expressed by the total fluence of the hole Q Ah injected from the anode side as Delta * apQ Ah 0.25 . Utilizing a threshold voltage shift DeltaV th method, it was found that the gate conduction in SONOS transistors is governed by a specific tunneling process, which depends on the voltage drop V OX across the tunnel oxide. It is also shown that the gate conduction mechanism through the ONO stacks makes a smooth transition from one tunneling process to another depending on the relationship between the V OX and the tunneling barrier height of Phi B
ISSN:1530-4388
1558-2574
DOI:10.1109/TDMR.2006.876614