Automatic generation of thin film process flows. II. Recipe generation, flow evaluation, and system framework

This paper is the second in a series of two papers describing the methodology and algorithms used in the development of MISTIC (Michigan synthesis tools for integrated circuits). Part I [see ibid., vol. 12, no. 1, Feb. 1999] discussed the basic topological algorithms used to produce generic sequence...

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Bibliographic Details
Published in:IEEE transactions on semiconductor manufacturing 1999-02, Vol.12 (1), p.129-138
Main Authors: Zaman, M.H., Carlen, E.T., Mastrangelo, C.H.
Format: Article
Language:English
Subjects:
Algorithms
BiCMOS integrated circuits
Construction
Devices
Dry etching
Editors
Fabrication
History
Integrated circuit synthesis
Mathematical analysis
Process design
Semiconductors
Sensor phenomena and characterization
Thin films
Transistors
Wet etching
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Summary:This paper is the second in a series of two papers describing the methodology and algorithms used in the development of MISTIC (Michigan synthesis tools for integrated circuits). Part I [see ibid., vol. 12, no. 1, Feb. 1999] discussed the basic topological algorithms used to produce generic sequences of processing steps required for the fabrication of a given device structure. Part II discusses the expansion of these sequences into complete process flows. This procedure involves the selection of specific recipes from a set of available processing resources and the calculation of recipe parameters. These processing resources are stored in a database central to the MISTIC system framework. Since many process flows are generated for a given device, the paper also discusses the calculation of suitable figures of merit. The capabilities of the MISTIC system are demonstrated with a BiCMOS example. The MISTIC system framework which contains the basic compiler and several supporting modules: a device builder, process viewer, and database editor is also presented.
ISSN:0894-6507
1558-2345
DOI:10.1109/66.744534