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A physical alpha-power law MOSFET model

A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified...

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Published in:IEEE journal of solid-state circuits 1999-10, Vol.34 (10), p.1410-1414
Main Authors: Bowman, K.A., Austin, B.L., Eble, J.C., Xinghai Tang, Meindl, J.D.
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Language:English
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cited_by cdi_FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673
cites cdi_FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673
container_end_page 1414
container_issue 10
container_start_page 1410
container_title IEEE journal of solid-state circuits
container_volume 34
creator Bowman, K.A.
Austin, B.L.
Eble, J.C.
Xinghai Tang
Meindl, J.D.
description A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration.
doi_str_mv 10.1109/4.792617
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fullrecord <record><control><sourceid>proquest_ieee_</sourceid><recordid>TN_cdi_proquest_miscellaneous_29000301</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>792617</ieee_id><sourcerecordid>29000301</sourcerecordid><originalsourceid>FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673</originalsourceid><addsrcrecordid>eNqF0DtLA0EUBeBBFIxRsLbaythsvDfzLkOID4ikUMFumJ2dISsTd91JCPn3bthgqdXlcj5OcQi5Rhgjgr5nY6knAuUJGSDnKkdJP07JAABVricA5-Qipc_uZUzhgIymWbPap8rZmNnYrGze1DvfZtHuspfl68P8LVvXpY-X5CzYmPzV8Q7Je5fNnvLF8vF5Nl3kjlK1ybFwtBRclFZJyYrSy8A4R4rOC0tBFsHZEJQrAAIDCwVSC1J4WtAgnJB0SEZ9b9PW31ufNmZdJedjtF--3iajUWsqGD3I2z_lRAMABfwfKg5cgujgXQ9dW6fU-mCatlrbdm8QzGFcw0w_bkdvelp573_ZMfwBGZRxqA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>28505706</pqid></control><display><type>article</type><title>A physical alpha-power law MOSFET model</title><source>IEEE Electronic Library (IEL) Journals</source><creator>Bowman, K.A. ; Austin, B.L. ; Eble, J.C. ; Xinghai Tang ; Meindl, J.D.</creator><creatorcontrib>Bowman, K.A. ; Austin, B.L. ; Eble, J.C. ; Xinghai Tang ; Meindl, J.D.</creatorcontrib><description>A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.792617</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit optimization ; Circuit simulation ; Circuits ; Current measurement ; Extrapolation ; Joining processes ; Law ; Leakage current ; Mathematical model ; Mathematical models ; MOSFET circuits ; MOSFETs ; Power generation ; Power measurement ; Power MOSFET ; Projection ; Semiconductors ; Velocity measurement</subject><ispartof>IEEE journal of solid-state circuits, 1999-10, Vol.34 (10), p.1410-1414</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673</citedby><cites>FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/792617$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,786,790,27957,27958,55147</link.rule.ids></links><search><creatorcontrib>Bowman, K.A.</creatorcontrib><creatorcontrib>Austin, B.L.</creatorcontrib><creatorcontrib>Eble, J.C.</creatorcontrib><creatorcontrib>Xinghai Tang</creatorcontrib><creatorcontrib>Meindl, J.D.</creatorcontrib><title>A physical alpha-power law MOSFET model</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration.</description><subject>Circuit optimization</subject><subject>Circuit simulation</subject><subject>Circuits</subject><subject>Current measurement</subject><subject>Extrapolation</subject><subject>Joining processes</subject><subject>Law</subject><subject>Leakage current</subject><subject>Mathematical model</subject><subject>Mathematical models</subject><subject>MOSFET circuits</subject><subject>MOSFETs</subject><subject>Power generation</subject><subject>Power measurement</subject><subject>Power MOSFET</subject><subject>Projection</subject><subject>Semiconductors</subject><subject>Velocity measurement</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1999</creationdate><recordtype>article</recordtype><recordid>eNqF0DtLA0EUBeBBFIxRsLbaythsvDfzLkOID4ikUMFumJ2dISsTd91JCPn3bthgqdXlcj5OcQi5Rhgjgr5nY6knAuUJGSDnKkdJP07JAABVricA5-Qipc_uZUzhgIymWbPap8rZmNnYrGze1DvfZtHuspfl68P8LVvXpY-X5CzYmPzV8Q7Je5fNnvLF8vF5Nl3kjlK1ybFwtBRclFZJyYrSy8A4R4rOC0tBFsHZEJQrAAIDCwVSC1J4WtAgnJB0SEZ9b9PW31ufNmZdJedjtF--3iajUWsqGD3I2z_lRAMABfwfKg5cgujgXQ9dW6fU-mCatlrbdm8QzGFcw0w_bkdvelp573_ZMfwBGZRxqA</recordid><startdate>19991001</startdate><enddate>19991001</enddate><creator>Bowman, K.A.</creator><creator>Austin, B.L.</creator><creator>Eble, J.C.</creator><creator>Xinghai Tang</creator><creator>Meindl, J.D.</creator><general>IEEE</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>7U5</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>19991001</creationdate><title>A physical alpha-power law MOSFET model</title><author>Bowman, K.A. ; Austin, B.L. ; Eble, J.C. ; Xinghai Tang ; Meindl, J.D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1999</creationdate><topic>Circuit optimization</topic><topic>Circuit simulation</topic><topic>Circuits</topic><topic>Current measurement</topic><topic>Extrapolation</topic><topic>Joining processes</topic><topic>Law</topic><topic>Leakage current</topic><topic>Mathematical model</topic><topic>Mathematical models</topic><topic>MOSFET circuits</topic><topic>MOSFETs</topic><topic>Power generation</topic><topic>Power measurement</topic><topic>Power MOSFET</topic><topic>Projection</topic><topic>Semiconductors</topic><topic>Velocity measurement</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Bowman, K.A.</creatorcontrib><creatorcontrib>Austin, B.L.</creatorcontrib><creatorcontrib>Eble, J.C.</creatorcontrib><creatorcontrib>Xinghai Tang</creatorcontrib><creatorcontrib>Meindl, J.D.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEL</collection><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>ANTE: Abstracts in New Technology &amp; Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Bowman, K.A.</au><au>Austin, B.L.</au><au>Eble, J.C.</au><au>Xinghai Tang</au><au>Meindl, J.D.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A physical alpha-power law MOSFET model</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1999-10-01</date><risdate>1999</risdate><volume>34</volume><issue>10</issue><spage>1410</spage><epage>1414</epage><pages>1410-1414</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><notes>ObjectType-Article-2</notes><notes>SourceType-Scholarly Journals-1</notes><notes>ObjectType-Feature-1</notes><notes>content type line 23</notes><abstract>A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration.</abstract><pub>IEEE</pub><doi>10.1109/4.792617</doi><tpages>5</tpages></addata></record>
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ispartof IEEE journal of solid-state circuits, 1999-10, Vol.34 (10), p.1410-1414
issn 0018-9200
1558-173X
language eng
recordid cdi_proquest_miscellaneous_29000301
source IEEE Electronic Library (IEL) Journals
subjects Circuit optimization
Circuit simulation
Circuits
Current measurement
Extrapolation
Joining processes
Law
Leakage current
Mathematical model
Mathematical models
MOSFET circuits
MOSFETs
Power generation
Power measurement
Power MOSFET
Projection
Semiconductors
Velocity measurement
title A physical alpha-power law MOSFET model
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-09-23T07%3A32%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_ieee_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20physical%20alpha-power%20law%20MOSFET%20model&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Bowman,%20K.A.&rft.date=1999-10-01&rft.volume=34&rft.issue=10&rft.spage=1410&rft.epage=1414&rft.pages=1410-1414&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/4.792617&rft_dat=%3Cproquest_ieee_%3E29000301%3C/proquest_ieee_%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c338t-1bc3d656da8774bde7f455131ce6a307bfcaff8cb00f40a0b13a076e3b3f6c673%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=28505706&rft_id=info:pmid/&rft_ieee_id=792617&rfr_iscdi=true