A physical alpha-power law MOSFET model

A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1999-10, Vol.34 (10), p.1410-1414
Main Authors: Bowman, K.A., Austin, B.L., Eble, J.C., Xinghai Tang, Meindl, J.D.
Format: Article
Language:English
Subjects:
Circuit optimization
Circuit simulation
Circuits
Current measurement
Extrapolation
Joining processes
Law
Leakage current
Mathematical model
Mathematical models
MOSFET circuits
MOSFETs
Power generation
Power measurement
Power MOSFET
Projection
Semiconductors
Velocity measurement
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Summary:A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.792617