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Two-stage approach for 12-V VR
To meet the stringent specifications of the voltage regulator (VR), the two-stage approach is proposed for the 12-V VR. This paper discusses detailed design considerations, which include the design of the first stage, optimization of the intermediate bus voltage, design of the intermediate bus capac...
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Published in: | IEEE transactions on power electronics 2004-11, Vol.19 (6), p.1498-1506 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | To meet the stringent specifications of the voltage regulator (VR), the two-stage approach is proposed for the 12-V VR. This paper discusses detailed design considerations, which include the design of the first stage, optimization of the intermediate bus voltage, design of the intermediate bus capacitors, and the design of the ultra-high frequency second stage. The analysis shows that the two-stage approach can realize high frequency, thus significantly reducing the output capacitance and therefore decreasing the cost. A 1.2-V/100-A prototype is built to verify the analysis. The second stage runs at 2MHz per phase and the total efficiency is as high as 81%. Compared to the conventional single-stage multiphase buck, the two-stage approach is more cost-effective and more efficient. |
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ISSN: | 0885-8993 1941-0107 |
DOI: | 10.1109/TPEL.2004.836678 |