A 1GHz alpha microprocessor

The architecture of a 1 GHz microprocessor with very large scale integration (VLSI) implementation was described. The microprocessor used 1.65 V nominal internal voltage and supported two voltage levels at the chip interface. A 1.5 V high speed transceiver logic (HSTL) signaling was used for interfa...

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Bibliographic Details
Main Authors: Benschneider, B J, Park, S, Allmon, R, Anderson, W, Arneborn, M, Cho, J, Choi, C, Clouser, J, Han, S, Hokinson, R, Hwang, G, Jung, D, Kim, J, Krause, J, Kwack, J
Format: Conference Proceeding
Language:English
Online Access:Get full text
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Summary:The architecture of a 1 GHz microprocessor with very large scale integration (VLSI) implementation was described. The microprocessor used 1.65 V nominal internal voltage and supported two voltage levels at the chip interface. A 1.5 V high speed transceiver logic (HSTL) signaling was used for interfacing to the secondary cache random access memory (RAM). The input noise margin level was controlled by analyzing the dynamic nodes on the chip.
ISSN:0193-6530