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A low-IF RX two-point capital sigma Delta -modulation TX CMOS single-chip Bluetooth solution
A new low-cost concept for a system-on-chip Bluetooth solution is proposed in this paper. The single chip includes all necessary baseband and RF parts to achieve full Bluetooth functionality and is implemented in a standard 0.25- mu m CMOS technology. The two-point modulation capital sigma Delta fra...
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Published in: | IEEE transactions on microwave theory and techniques 2001-01, Vol.49 (9) |
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Main Authors: | , , , , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Online Access: | Get full text |
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Summary: | A new low-cost concept for a system-on-chip Bluetooth solution is proposed in this paper. The single chip includes all necessary baseband and RF parts to achieve full Bluetooth functionality and is implemented in a standard 0.25- mu m CMOS technology. The two-point modulation capital sigma Delta fractional N phase-locked loop achieves a phase noise of -124 dBc/Hz at 3-MHz offset. The sensitivity of the embedded low-IF receiver is measured to be -82 dBm at a bit error rate of 0.1%. The power supply voltages for the digital and analog parts are internally regulated to 2.65 V. The maximum current consumption of the analog part is 60 mA |
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ISSN: | 0018-9480 |
DOI: | 10.1109/22.942563 |