Loading…

A 56-nm CMOS 99-mm2 8-Gb multi-level NAND flash memory with 10-MB/s program throughput

[...] noise cancellation circuits and the dual VDD-line scheme realize both a small die size and a fast programming.

Saved in:
Bibliographic Details
Main Authors: TAKEUCHI, Ken, KAMEDA, Yasushi, IWAI, Makoto, SHIRAKAWA, Masanobu, ICHIGE, Masayuki, HATAKEYAMA, Kazuo, TANAKA, Shinichi, KAMEI, Teruhiko, FU, Jia-Yi, CEMEA, Adi, YAN LI, HIGASHITAM, Masaaki, FUJIMURA, Susumu, HEMINK, Gertjan, SATO, Shinji, OOWADA, Ken, LEE, Shih-Chung, HAYASHIDA, Naoki, JUN WAN, LUTZE, Jeffrey, TSAO, Shouchang, MOFIDI, Mehrdad, SAKURAI, Kiyofumi, OTAKE, Hiroyuki, TOKIWA, Naoya, WAKI, Hiroko, NOZAWA, Yasumitsu, KANAZAWA, Kazuhisa, OHSHIMA, Shigeo, HOSONO, Koji, SHIGA, Hitoshi, WATANABE, Yoshihisa, FUTATSUYAMA, Takuya, SHINDO, Yoshihiko, KOJIMA, Masatsugu
Format: Conference Proceeding
Language:English
Subjects:
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:[...] noise cancellation circuits and the dual VDD-line scheme realize both a small die size and a fast programming.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2006.888299