Comparison of Three Single-Phase PLL Algorithms for UPS Applications

In this paper, the performance assessment of three software single-phase phase-locked loop (PLL) algorithms is carried out by means of dynamic analysis and experimental results. Several line disturbances such as phase-angle jump, voltage sag, frequency step, and harmonics are generated by a DSP toge...

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Bibliographic Details
Published in:IEEE transactions on industrial electronics (1982) 2008-08, Vol.55 (8), p.2923-2932
Main Authors: Santos Filho, Rubens M., Seixas, Paulo F., Cortizo, PorfÍrio C., Torres, Leonardo A. B., Souza, AndrÉ F.
Format: Article
Language:English
Subjects:
Algorithm design and analysis
Algorithms
Application software
Computation
Computer programs
Delay
Digital signal processing
Electric potential
Frequency conversion
Guidelines
Mathematical modeling
Mathematical models
Performance analysis
Phase locked loops
phase-locked loops (PLLs)
Software algorithms
Software performance
Uninterruptible power systems
uninterruptible power systems (UPSs)
Voltage fluctuations
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Summary:In this paper, the performance assessment of three software single-phase phase-locked loop (PLL) algorithms is carried out by means of dynamic analysis and experimental results. Several line disturbances such as phase-angle jump, voltage sag, frequency step, and harmonics are generated by a DSP together with a D/A converter and applied to each PLL. The actual minus the estimated phase-angle values are displayed, providing a refined method for performance evaluation and comparison. Guidelines for parameters adjustments are also presented. In addition, practical implementation issues such as computational delay effects, ride-through, and computational load are addressed. The developed models proved to accurately represent the PLLs under real test conditions.
ISSN:0278-0046
1557-9948
DOI:10.1109/TIE.2008.924205