Modified Ramped Current Stress Technique for Monitoring Thin Dielectrics Reliability and Charge Degradation

Herein, a novel technique to monitor the quality and reliability of thin nano‐scale dielectric films is suggested. The method is based on the modification of the current stress technique (J‐Ramp) described in the corresponding JEDEC standard. The proposed technique, in addition to the J‐ramp tests,...

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Bibliographic Details
Published in:Physica status solidi. A, Applications and materials science Applications and materials science, 2022-05, Vol.219 (9), p.n/a
Main Authors: Andreev, Dmitrii V., Maslovsky, Vladimir M., Andreev, Vladimir V., Stolyarov, Alexander A.
Format: Article
Language:English
Subjects:
charge build-up
Degradation
Dielectric breakdown
gate dielectrics
injection currents
MIS (semiconductors)
MIS structures
Monitoring
Reliability
stress
Switches
test techniques
Thin films
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Summary:Herein, a novel technique to monitor the quality and reliability of thin nano‐scale dielectric films is suggested. The method is based on the modification of the current stress technique (J‐Ramp) described in the corresponding JEDEC standard. The proposed technique, in addition to the J‐ramp tests, allows monitoring a change of charge state of the gate dielectric during all the tests. To implement this, in the suggested method before each transition to a higher current level, the current level is switched to the injection mode by a measurement current level and the change of voltage across the metal–insulator–semiconductor (MIS) structure is measured. A density of the measurement current level is chosen based on the condition that under this current level, a considerable charge degradation of the dielectric should not be observed, and the switches to the measurement current level should not considerably influence the studied sample. In addition to the monitoring of the charge injected until the dielectric breakdown, the proposed method allows to monitor the value of the injected charge at which the unacceptable degradation of MIS device characteristics takes place and, accordingly, to estimate the reliability of the dielectric film based on statistical measurements of these values. Herein, a novel technique to monitor electro‐physical characteristics of metal–insulator–semiconductor (MIS) devices and control their charge state is proposed. The suggested method is based on a JEDEC standard method, which is the current stress technique (J‐Ramp). The proposed method gives the capability to predict the malfunction of MIS devices at an earlier stage in comparison with the J‐Ramp.
ISSN:1862-6300
1862-6319
DOI:10.1002/pssa.202100400