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Normally-Off p-Gate Transistor Based on AlGaN/GaN Heterostructures
Conventional AlGaN/GaN transistors are depletion-mode devices. For most applications, the E -mode, where the channel current is zero at the zero gate voltage, should be implemented. The feasibility of the E -mode opens prospects for designing digital circuits and power devices. A new method for fabr...
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Published in: | Semiconductors (Woodbury, N.Y.) N.Y.), 2021-12, Vol.55 (13), p.1039-1044 |
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Main Authors: | , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | Conventional AlGaN/GaN transistors are depletion-mode devices. For most applications, the
E
-mode, where the channel current is zero at the zero gate voltage, should be implemented. The feasibility of the
E
-mode opens prospects for designing digital circuits and power devices. A new method for fabricating normally-off
E
-mode transistors, i.e., the use of
p
-GaAs layer under the gate, is considered. As a method for forming this layer, plasma-chemical removal of the
p
-GaN layer outside the gate is chosen. This gives rise to problems of an inhomogeneous etching depth and poor control of the etch rate. The heterostructure with an additional AlN barrier layer which is an etch stop layer is developed. The results of the study of the effect of various heterostructure parameters on the carrier concentration in the channel, and hence, on the transistor’s output characteristics, and the design process is developed. According to the latter, samples of normally-off transistors are fabricated, in which the maximum drain current in the on-state is 350 mA/mm at a gate voltage of 4 V, and the breakdown voltage is ~550 V in the off state at a gate voltage of 0 V. |
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ISSN: | 1063-7826 1090-6479 |
DOI: | 10.1134/S1063782621130042 |