A methodology for mechanical stress and wafer warpage minimization during 3D NAND fabrication

The introduction of the 3D NAND architecture brought new integration challenges, including the impact of fabrication-induced mechanical stress. If not controlled, the mechanical stress can result in high wafer warpage, incompatible with wafer handling and lithography steps. This work presents a stud...

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Bibliographic Details
Published in:Microelectronic engineering 2022-02, Vol.254, p.111660, Article 111660
Main Authors: Kruv, A., Gonzalez, M., Okudur, O.O., Spampinato, V., Franquet, A., Palayam, S.V., Arreghini, A., Van den bosch, G., Rosmeulen, M., De Wolf, I.
Format: Article
Language:English
Subjects:
3-D technology
Annealing
Finite element analysis
Finite element method
Mathematical models
Mechanical properties
Optimization
Outgassing
Residual stress
Silicon dioxide
Silicon nitride
Stacks
Stress measurement
Warpage
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Summary:The introduction of the 3D NAND architecture brought new integration challenges, including the impact of fabrication-induced mechanical stress. If not controlled, the mechanical stress can result in high wafer warpage, incompatible with wafer handling and lithography steps. This work presents a study of the impact of annealing on the warpage and residual stress of blanket SiO2/Si3N4 stacks relevant to 3D NAND fabrication. It is shown that annealing promotes H outgassing from the Si3N4 layers and minimizes their residual stress. The optimal temperature is calculated by combining the warpage measurements with finite element modelling. That allows to calibrate the model on simplified samples and then expand it for stacks with a higher number of layers, which can be beneficial for the future 3D NAND generations. 3D NAND, fabrication, mechanical stress. [Display omitted] •The impact of annealing on the warpage of 3D NAND-related SiO2/Si3N4 stacks is shown.•The study is performed by combining experiments with Finite Element Modelling.•Annealing promotes H outgassing from Si3N4, which minimizes wafer warpage.•The optimal annealing temperature was calculated for 8–128 bilayers stacks.
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2021.111660