Low power, high speed VLSI circuits in 16nm technology

In this paper deals with simulation of FINFET device and subsequent application to a design of 6 Transistor Static RAM cell with FINFET as well as analysis of design issues and accomplishment metrics of advanced SRAM cells. As an initiation, the performance of the suggested 6T-SRAM cell using FINFET...

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Bibliographic Details
Main Authors: Alluri, Sudhakar, Balaji, B., Cury, Ch
Format: Conference Proceeding
Language:English
Subjects:
Acceptable noise levels
Field effect transistors
Foundries
Integrated circuits
Leakage current
MOSFETs
Power management
Semiconductor devices
Threshold currents
Transistors
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Summary:In this paper deals with simulation of FINFET device and subsequent application to a design of 6 Transistor Static RAM cell with FINFET as well as analysis of design issues and accomplishment metrics of advanced SRAM cells. As an initiation, the performance of the suggested 6T-SRAM cell using FINFET has been evaluated for this operation with low power domain, showing smaller SCEs, ultra-small acceptable time and Hugh stability. The static noise margin, leakage current, power dissipation & sub threshold current of 6 Transistor Static RAM using FINFET have been compared with MOSFET 6 Transistor Static RAM cell at 45nm technology node. After the remarkable reduction in Leakage current and power reduction, the same approach is then implemented to advanced SRAM cells. We have compared various advanced proposed SRAM cells using FINFET with the conventional advanced MOSFET with Static RAM. The significant leakage reduction have been observed when anyone switch from conventional MOSFET’s to FINFET’s. Leakage current for conventional MOSFET’s based 7T, 8T, 9T, 10T, 11T & 12T is 74.99 pA, 70.22 pA, 74.83 pA, 67.63 pA, 74.71pA, 63.56 pA and 73.96 pA respectively which have been reduced to 76.550 fA, 76.150 fA, 74.302 fA, 74.012 fA, 70.856 fA and 70.423 fA respectively for advanced FINFET based SRAM cells. Power dissipation for conventional MOSFET based 7, 8, 9, 10, 11& 12Transistor is 81.51nW, 80.77nW, 81.47nW, 79.47nW, 81.39nW, 78.59nW and 81.27nW respectively which have reduced to 9.972nW, 9.815nW, 9.565nW, 9.432nW, 9.148nW and 9.046nW respectively for advanced FINFET based SRAM cells.
ISSN:0094-243X
1551-7616
DOI:10.1063/5.0060101