Deep Understanding of Negative Gate Voltage Restriction for SiC mosfet Under Wide Temperature Range

In this letter, the origin and related physical insights of gate reliability issues under various V gs and high temperatures (up to 300 °C) are revealed in-depth, through splitting MOS gate structure of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) into N-type JF...

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Bibliographic Details
Published in:IEEE transactions on power electronics 2021-08, Vol.36 (8), p.8622-8627
Main Authors: Chen, Ximing, Li, Xuan, Shi, Bangbing, Xiang, Junmiao, Dai, Yuanzhuo, Li, Chenzhan, Deng, Xiaochuan, Luo, Haihui, Wu, Yudong, Zhang, Bo
Format: Article
Language:English
Subjects:
Barrier height
Bias
Capacitors
Converters
Degradation
Dielectric breakdown
Electrons
Field effect transistors
Fowler–Nordheim (F-N) tunneling
gate reliability issue
high temperature
Hopping conduction
JFET
Logic gates
Metal oxide semiconductors
MOSFET
MOSFETs
Reliability
Reliability analysis
Safety
Semiconductor devices
Silicon carbide
silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFET)
Temperature
Temperature measurement
time-dependent dielectric breakdown (TDDB)
Tunneling
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Summary:In this letter, the origin and related physical insights of gate reliability issues under various V gs and high temperatures (up to 300 °C) are revealed in-depth, through splitting MOS gate structure of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) into N-type JFET and P-type channel region under identical manufacturing processes and thermal budgets of SiC MOSFETs. From 25 to 300 °C, the safety limit of positive V gs of SiC MOSFETs is mainly dependent on the gate oxide on the JFET surface, whereas that of negative V gs is dependent on the gate oxide on the channel surface. The gate oxide on the channel surface is weaker than that on the JFET surface in terms of Fowler-Nordheim (F-N) tunneling, resulting in asymmetric safety V gs of current SiC MOSFET. Moreover, when temperature ranges from 25 to 150 °C, the degradation of gate oxide under −15 V 
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2021.3056435