On the Construction of Regular QC-LDPC Codes With Low Error Floor

Quasi-cyclic low-density (QC-LDPC) codes benefit from efficient encoding hardware and display excellent error correcting performance. Therefore, they have been accepted into the 5G standards in addition to being potential candidates for next generation mobile systems. However, dominant trapping sets...

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Bibliographic Details
Published in:IEEE communications letters 2020-01, Vol.24 (1), p.25-28
Main Authors: Sariduman, Abdullah, Pusane, Ali E., Taskin, Z. Caner
Format: Article
Language:English
Subjects:
Algorithms
Annealing
Codes
Computer simulation
Decoding
elementary trapping sets
Error correcting codes
Error correction
error floor
Floors
Low density parity check (LDPC) codes
Low density parity check codes
Mobile communication systems
Parity check codes
quasi-cyclic (QC)
Signal to noise ratio
Simulated annealing
Trapping
trapping sets
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Summary:Quasi-cyclic low-density (QC-LDPC) codes benefit from efficient encoding hardware and display excellent error correcting performance. Therefore, they have been accepted into the 5G standards in addition to being potential candidates for next generation mobile systems. However, dominant trapping sets in the Tanner graphs cause some failures for the iterative decoding algorithm. In this letter, we propose a simulated annealing based method to find regular QC-LDPC codes without dominant trapping sets and have good error floor performance. Simulation results show that our proposed method generates QC-LDPC codes that have the best trapping sets distribution among recent works and better frame rate performance than others.
ISSN:1089-7798
1558-2558
DOI:10.1109/LCOMM.2019.2953058