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Effect of the interfacial (low-k SiO2 vs high-k Al2O3) dielectrics on the electrical performance of a-ITZO TFT
In this work, the effect of an interfacial low-k dielectric layer such as SiO 2 was suggested along with the effect of an interfacial high-k dielectric layer such as Al 2 O 3 on the electrical characteristics and then the electrical properties of the a-ITZO TFT such as the equivalent oxide thickness...
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| Published in: | Applied nanoscience 2018-11, Vol.8 (8), p.1865-1875 |
|---|---|
| Main Authors: | , , |
| Format: | Article |
| Language: | English |
| Subjects: | |
| Citations: | Items that this one cites Items that cite this one |
| Online Access: | Get full text |
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| Summary: | In this work, the effect of an interfacial low-k dielectric layer such as SiO
2
was suggested along with the effect of an interfacial high-k dielectric layer such as Al
2
O
3
on the electrical characteristics and then the electrical properties of the a-ITZO TFT such as the equivalent oxide thickness (EOT) of gate dielectric, gate capacitance per unit area (
C
i
), on-current (
I
on
), on–off current (
I
on
/
I
off
) ratio and field-effect mobility (
μ
FE
) of the a-ITZO TFT. The main purpose of this study is to conduct a comparative study to highlight the impact of the interfacial high-k dielectrics such as Al
2
O
3
, compared to low-k SiO
2
, the existing between the a-ITZO active layer and high-k HfO
2
layer in a-ITZO TFT based on the double-layered dielectric. Therefore, the several analyses were implemented through numerical simulation of the device by the Silvaco TCAD Atlas software that was used to carry out a detailed numerical analysis for investigating the relationship between different types of the interfacial (low-k and high-k)dielectric oxides and the performance of a-ITZO TFT. The results showed that TFT based on the double-layered dielectric (Al
2
O
3
/HfO
2
) with a physical thickness (
PT
=
30
nm
) it can provide good electrical properties (
EOT
=
6.33
nm
,
C
i
=
5.45
×
10
-
7
F
c
m
-
2
,
I
on
=
1.61
×
10
-
5
A
,
I
on
/
I
off
=
1.56
×
10
9
and
μ
FE
=
24.11
c
m
2
V
-
1
s
-
1
) better than the properties provided by TFT based on the double-layered dielectric (SiO
2
/HfO
2
) for the same physical thickness (
EOT
=
12.23
nm
,
C
i
=
2.82
×
10
-
7
F
c
m
-
2
,
I
on
=
8.54
×
10
-
6
A
,
I
on
/
I
off
=
8.27
×
10
8
and
μ
FE
=
29.31
c
m
2
V
-
1
s
-
1
). However, we cannot neglect the fundamental role of the interfacial low-k SiO
2
layer between the channel and the high-k dielectric, which has some beneficial qualities with regard to the carrier mobility in the transistor channel. In addition, although there is a difference in the value of leakage between the two devices, its effect is very poor on the performance of the device and its reliability, especially for low gate tensions. |
|---|---|
| ISSN: | 2190-5509 2190-5517 |
| DOI: | 10.1007/s13204-018-0866-x |