A Low-Power Hybrid Adaptive CORDIC

The purpose of this brief is to introduce a hybrid adaptive coordinate rotation digital computer (HA-CORDIC) implemented on 65-nm silicon on thin buried oxide technology. The supply voltage of HA-CORDIC ranges from 0.25 V to 1.2 V and the lowest energy in active mode and sleep mode are 2.4 pJ/cycle...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2018-04, Vol.65 (4), p.496-500
Main Authors: Nguyen, Hong-Thu, Nguyen, Xuan-Thuan, Pham, Cong-Kha
Format: Article
Language:English
Subjects:
65 nm
Adaptive systems
CORDIC
Digital computers
Leakage current
Leakage currents
Logic gates
low power
Power demand
Resource management
SOTB
Threshold voltage
Transistors
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Summary:The purpose of this brief is to introduce a hybrid adaptive coordinate rotation digital computer (HA-CORDIC) implemented on 65-nm silicon on thin buried oxide technology. The supply voltage of HA-CORDIC ranges from 0.25 V to 1.2 V and the lowest energy in active mode and sleep mode are 2.4 pJ/cycle and 0.003 pJ/cycle, respectively. By changing body bias voltages, the leakage current can be reduced to as small as 1.0 nA. Its experimental results proves that HA-CORDIC is potentially a good choice for low-power and high-precision applications in comparison with the previous work.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2017.2732451