Algorithm for Extracting Parameters of the Coupling Capacitance Hysteresis Cycle for TSV Transient Modeling and Robustness Analysis

This paper explains the extraction from the measurement of the parameters necessary in time domain to identify the hysteretic behavior of the coupling capacitance of through silicon vias (TSVs). The algorithm was developed in such a way that the equivalent capacitance model can be implemented into s...

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Bibliographic Details
Published in:IEEE transactions on electromagnetic compatibility 2017-08, Vol.59 (4), p.1329-1338
Main Authors: Piersanti, Stefano, Pellegrino, Enza, de Paulis, Francesco, Orlandi, Antonio, Jung, Daniel H., Dong-Hyun Kim, Joungho Kim, Jun Fan
Format: Article
Language:English
Subjects:
Active devices
Algorithms
Capacitance
Coupling
Couplings
Crosstalk
dielectric hysteresis
equivalent circuit modeling
genetic algorithm (GA)
Genetic algorithms
Hysteresis
Integrated circuit modeling
Integrated circuits
Interconnections
Mathematical model
Mathematical models
nonlinear effects
Parameter identification
Robustness
robustness analysis
signal integrity
Silicon
Simulators
through silicon vias (TSVs)
Through-silicon vias
time domain
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Summary:This paper explains the extraction from the measurement of the parameters necessary in time domain to identify the hysteretic behavior of the coupling capacitance of through silicon vias (TSVs). The algorithm was developed in such a way that the equivalent capacitance model can be implemented into standard circuit simulators. A comparison with a known procedure based on the genetic algorithm approach is offered as validation. Results showing the robustness of the algorithm and the effects of the hysteresis on the crosstalk among TSV and integrated circuit active devices are reported and discussed.
ISSN:0018-9375
1558-187X
DOI:10.1109/TEMC.2016.2621259