Spin-Transfer Torque Memories: Devices, Circuits, and Systems

Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent integration density, acceptable read and write performance, and compatibility with CMOS process technology. However, several...

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Bibliographic Details
Published in:Proceedings of the IEEE 2016-07, Vol.104 (7), p.1449-1488
Main Authors: Fong, Xuanyao, Kim, Yusung, Venkatesan, Rangharajan, Choday, Sri Harsha, Raghunathan, Anand, Roy, Kaushik
Format: Article
Language:English
Subjects:
Acceptability
Cache storage
Circuits
CMOS
Design engineering
Design of spin-transfer torque MRAM
Devices
emerging nonvolatile memory technology
Endurance
magnetic tunnel junction
Magnetic tunneling
Memory management
Nonvolatile memory
nonvolatile on-chip caches
Perpendicular magnetic anisotropy
Spin valves
State of the art
System-on-chip
Torque
Torque control
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Summary:Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent integration density, acceptable read and write performance, and compatibility with CMOS process technology. However, several obstacles need to be overcome for STT-MRAM to become the universal memory technology. This paper first reviews the fundamentals of STT-MRAM and discusses key experimental breakthroughs. The state of the art in STT-MRAM is then discussed, beginning with the device design concepts and challenges. The corresponding bit-cell design solutions are also presented, followed by the STT-MRAM cache architectures suitable for on-chip applications.
ISSN:0018-9219
1558-2256
DOI:10.1109/JPROC.2016.2521712