Contact-Resistance Reduction for Strained n-FinFETs With Silicon-Carbon Source/Drain and Platinum-Based Silicide Contacts Featuring Tellurium Implantation and Segregation

Tellurium (Te) implantation was introduced to tune the effective electron Schottky barrier height (SBH) Φ B n of platinum-based silicide (PtSi) contacts formed on n-type silicon-carbon (Si:C). Te introduced by ion implantation prior to Pt deposition segregated at the PtSi:C/Si:C interface during PtS...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2011-11, Vol.58 (11), p.3852-3862
Main Authors: Shao-Ming Koh, Kong, E. Y-J, Bin Liu, Chee-Mang Ng, Samudra, G. S., Yee-Chia Yeo
Format: Article
Language:English
Subjects:
Applied sciences
Contact resistance
Design. Technologies. Operation analysis. Testing
Devices
Drains
Electronics
Exact sciences and technology
fin field-effect transistor (FinFET)
Implantation
Instability
Integrated circuits
Logic gates
Microelectronic fabrication (materials and surfaces technology)
platinum silicide (PtSi)
Reduction
Resistance
Schottky barrier
Schottky barriers
Segregations
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicidation
Silicides
Silicon
silicon-carbon (Si:C)
Substrates
Tellurium
Tellurium (Te)
Transistors
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Summary:Tellurium (Te) implantation was introduced to tune the effective electron Schottky barrier height (SBH) Φ B n of platinum-based silicide (PtSi) contacts formed on n-type silicon-carbon (Si:C). Te introduced by ion implantation prior to Pt deposition segregated at the PtSi:C/Si:C interface during PtSi:C formation. The presence of Te at the PtSi:C/Si:C interface leads to a low Φ B n of 120 meV for PtSi:C contacts. The integration of Te-segregated PtSi:C contacts on strained n-channel fin field-effect transistors (FinFETs) with Si:C source/drain (S/D) stressors achieves the lowering of the parasitic series resistance R SD by ~62% and increases the saturation drive current by ~22%. The Te-segregated contact-resistance reduction technology does not degrade the short-channel effects and positive-bias temperature instability characteristics of n-FinFETs with Si:C S/D. As PtSi has a low SBH for holes and is a suitable contact for p-FinFETs, this new contact-resistance reduction technology has potential to be introduced as a single-metal-silicide dual-barrier-height solution for future complementary metal-oxide-semiconductor FinFET technology.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2011.2166077