Impact of Line-Edge Roughness on Double-Gate Schottky-Barrier Field-Effect Transistors

The impact of line-edge roughness (LER) on double-gate (DG) Schottky-barrier field-effect transistors (SBFETs) in the level of device and circuit was investigated by a statistical simulation. The LER sequence is statistically generated by a Fourier analysis of the power spectrum of the Gaussian auto...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2009-06, Vol.56 (6), p.1211-1219
Main Authors: Yu, Shimeng, Zhao, Yuning, Zeng, Lang, Du, Gang, Kang, Jinfeng, Han, Ruqi, Liu, Xiaoyan
Format: Article
Language:English
Subjects:
Applied sciences
Autocorrelation functions
Correlation
Design. Technologies. Operation analysis. Testing
Devices
Electronics
Exact sciences and technology
FinFETs
Fluctuation
Fourier analysis
Integrated circuits
Integrated circuits by function (including memories and processors)
line-edge roughness (LER)
Logic gates
parameter fluctuations
process variations
Random access memory
Roughness
Schottky-barrier field-effect transistors (SBFETs)
Semiconductor devices
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
Simulation
SRAM stability
Threshold voltage
Transistors
Tunneling
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Summary:The impact of line-edge roughness (LER) on double-gate (DG) Schottky-barrier field-effect transistors (SBFETs) in the level of device and circuit was investigated by a statistical simulation. The LER sequence is statistically generated by a Fourier analysis of the power spectrum of the Gaussian autocorrelation function. The results show that SBFETs are more sensitive to the LER effect in the high- V gs region and less sensitive in the subthreshold region compared with DG FinFETs. The aggressive fluctuation of drive current can be attributed to the variation of tunneling barrier width. Lowering the Schottky-barrier height and increasing the silicon-body thickness can suppress the parameter fluctuations from the LER effect. The simulation also shows that a 6T SRAM cell consisting of SBFETs is more vulnerable to noise disturbance than its counterpart consisting of FinFETs, particularly for the read operation, which is due to a larger mismatch of drivability of SBFETs within the cell.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2009.2017644