Joint Equalization and Coding for On-Chip Bus Communication

In this paper, we propose using joint equalization and coding to improve on-chip communication speeds by signaling at rates beyond the rate governed by resistance-capacitance (RC) delay of the interconnect. Operating beyond the RC limit introduces inter-symbol interference (ISI). We mitigate the eff...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2008-03, Vol.16 (3), p.314-318
Main Authors: Sridhara, S.R., Balamurugan, G., Shanbhag, N.R.
Format: Article
Language:English
Subjects:
Applied sciences
Buses (vehicles)
Capacitance
CMOS
CMOS technology
Coding
Crosstalk
crosstalk avoidance
Delay
Design. Technologies. Operation analysis. Testing
Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
Electronics
Equalization
Exact sciences and technology
Integrated circuit interconnections
Integrated circuits
Integrated circuits by function (including memories and processors)
interconnection networks
Intersymbol interference
Network-on-a-chip
on-chip buses
Pulse width modulation inverters
Reinforced concrete
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
System-on-a-chip
system-on-chip (SOC)
Thresholds
Very large scale integration
Wire
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Summary:In this paper, we propose using joint equalization and coding to improve on-chip communication speeds by signaling at rates beyond the rate governed by resistance-capacitance (RC) delay of the interconnect. Operating beyond the RC limit introduces inter-symbol interference (ISI). We mitigate the effects of ISI by employing equalization. The proposed equalizer employs a variable threshold inverter whose switching threshold is modified as a function of past output of the bus. We demonstrate even higher speedups by combining equalization with crosstalk avoidance coding. Specifically, simulation results for a 10-mm 32-bit bus in 0.13-mum CMOS technology show that 1.28 speedup is achievable by equalization alone and 2.30 speedup is achievable by joint equalization and coding.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2007.915484