A novel low-temperature (Ba, Sr)TiO3(BST) process with Ti/TiN barrier for Gbit DRAM applications

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Bibliographic Details
Published in:Microelectronic engineering 1999-09, Vol.48 (1-4), p.299-302
Main Authors: BEITEL, G, WENDT, H, NAGEL, N, GSCHWANDTNER, A, PAMLER, W, HÖNLEIN, W, DEHM, C, MAZURE, C, FRITSCH, E, WEINRICH, V, ENGELHARDT, M, HASLER, B, RÖHR, T, BERGMANN, R, SCHELER, U, MALEK, K.-H
Format: Article
Language:English
Subjects:
Applied sciences
Electronics
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
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ISSN:0167-9317
1873-5568
DOI:10.1016/S0167-9317(99)00393-7