TOWARDS THE DESIGN OF A HIGH PERFORMANCE ACTIVE NODE

Achieving high performance in active networks is one of the most challenging task. In this paper, we propose an architecture for the design of next generation gigabit active routers. This original architecture allows service deployment of 4 levels: inside network cards, in kernel space, in user spac...

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Bibliographic Details
Published in:Parallel processing letters 2003-06, Vol.13 (2), p.149-167
Main Authors: GELAS, JEAN-PATRICK, EL HADRI, SAAD, LEFÈVRE, LAURENT
Format: Article
Language:English
Subjects:
Applied sciences
Computer science
control theory
systems
Computer systems and distributed systems. User interface
Exact sciences and technology
Software
Telecommunications
Telecommunications and information theory
Teleprocessing networks. Isdn
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Summary:Achieving high performance in active networks is one of the most challenging task. In this paper, we propose an architecture for the design of next generation gigabit active routers. This original architecture allows service deployment of 4 levels: inside network cards, in kernel space, in user space and on distributed computing resources. We deploy and validate this architecture within the Tamanoir execution environment. First experiments on gigabit network platforms are described.
ISSN:0129-6264
1793-642X
DOI:10.1142/S0129626403001215