CMOS with active well bias for low-power and RF/analog applications

We show that with a forward body bias, CMOS performance can be improved for those applications which are primarily concerned with speed, and for those which have fixed performance targets but desire lower switching energy (higher MHz/mW). Thus V/sub t/ can be set according to standby power requireme...

Full description

Saved in:
Bibliographic Details
Main Authors: Wann, C., Harrington, J., Mih, R., Biesemans, S., Han, K., Dennard, R., Prigge, O., Chuan Lin, Mahnkopf, R., Chen, B.
Format: Conference Proceeding
Language:English
Subjects:
Capacitance
CMOS technology
Delay
Design engineering
Diodes
Guidelines
MOSFET circuits
Power engineering and energy
Radio frequency
Research and development
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We show that with a forward body bias, CMOS performance can be improved for those applications which are primarily concerned with speed, and for those which have fixed performance targets but desire lower switching energy (higher MHz/mW). Thus V/sub t/ can be set according to standby power requirement or device design (well and halo engineering), forward body bias is then applied to improve speed or to reduce active power. No compromise in I/sub off/ results if the forward bias is applied when the circuits are active, during which time I/sub off/ and the leakage current are small compared to the switching current. Therefore a low-power CMOS strategy should use a MOSFET as a four-terminal device with a fast top gate and a slow bottom gate shared by a block. Deep-trench isolation with STI provides fine-grain isolation for body bias blocks without area penalty. Making the body available also improves the device analog properties and enables new applications. We present an active-well VCO/mixer as an example.
DOI:10.1109/VLSIT.2000.852808