Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer- semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thi...

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Bibliographic Details
Published in:IEEE electron device letters 2015-09, Vol.36 (9), p.884-886
Main Authors: Kim, Seung-Hwan, Kim, Gwang-Sik, Kim, Jeong-Kyu, Park, Jin-Hong, Shin, Changhwan, Choi, Changhwan, Yu, Hyun-Yong
Format: Article
Language:English
Subjects:
Fermi level unpinning
Gallium arsenide
HEMTs
II-VI semiconductor materials
MODFETs
Ohmic contacts
Semiconductor process modeling
specific contact resistivity
Zinc oxide
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Summary:We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer- semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 10 18 cm -3 ) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2015.2453479