Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming

In this work, we present a true 3D 128 Gb 2 bit/cell vertical-NAND (V-NAND) Flash product for the first time. The use of barrier-engineered materials and gate all-around structure in the 3D V-NAND cell exhibits advantages over 1 × nm planar NAND, such as small Vth shift due to small cell coupling an...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2015-01, Vol.50 (1), p.204-213
Main Authors: Ki-Tae Park, Sangwan Nam, Daehan Kim, Pansuk Kwak, Doosub Lee, Yoon-He Choi, Myung-Hoon Choi, Dong-Hun Kwak, Doo-Hyun Kim, Min-Su Kim, Hyun-Wook Park, Sang-Won Shim, Kyung-Min Kang, Sang-Won Park, Kangbin Lee, Hyun-Jun Yoon, Kuihan Ko, Shim, Dong-Kyo, Ahn, Yang-Lo, Ryu, Jinho, Kim, Donghyun, Yun, Kyunghwa, Kwon, Joonsoo, Shin, Seunghoon, Byeon, Dae-Seok, Choi, Kihwan, Han, Jin-Man, Kyung, Kye-Hyun, Choi, Jeong-Hyuk, Kim, Kinam
Format: Article
Language:English
Subjects:
3-D vertical-nand flash
Arrays
Ash
Couplings
External high-voltage supply
good endurance
high performance
Logic gates
Microprocessors
negative counter-pulse
Programming
WL crosstalk reduction
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Summary:In this work, we present a true 3D 128 Gb 2 bit/cell vertical-NAND (V-NAND) Flash product for the first time. The use of barrier-engineered materials and gate all-around structure in the 3D V-NAND cell exhibits advantages over 1 × nm planar NAND, such as small Vth shift due to small cell coupling and narrow natural Vth distribution. Also, a negative counter-pulse scheme realizes a tightly programmed cell distribution. In order to reduce the effect of a large WL coupling, a glitch-canceling discharge scheme and a pre-offset control scheme is implemented. Furthermore, an external high-voltage supply scheme along with the proper protection scheme for a high-voltage failure is used to achieve low power consumption. The chip accomplishes 50 MB/s write throughput with 3 K endurance for typical embedded applications. Also, extended endurance of 35 K is achieved with 36 MB/s of write throughput for data center and enterprise SSD applications.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2014.2352293