Dynamic and partial reconfiguration of Zynq 7000 under Linux

Dynamic and partial reconfiguration is a well-known technique to update the configuration of a field programmable gate array (FPGA) at runtime. Xilinx FPGAs support this feature which enables extensive research in this domain. However, until today the usage and exploitation of partial reconfiguratio...

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Bibliographic Details
Main Authors: Al Kadi, Muhammed, Rudolph, Patrick, Gohringer, Diana, Hubner, Michael
Format: Conference Proceeding
Language:English
Subjects:
Clocks
dynamic and partial reconfiguration
Field programmable gate arrays
FPGA
Hardware
Linux
Runtime
Software
Vehicle dynamics
ZedBoard
Zynq 7000
Online Access:Request full text
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Summary:Dynamic and partial reconfiguration is a well-known technique to update the configuration of a field programmable gate array (FPGA) at runtime. Xilinx FPGAs support this feature which enables extensive research in this domain. However, until today the usage and exploitation of partial reconfiguration has a hurdle. The complex development process, as well as the required control at runtime keeps this technique away from many applications where it would be beneficial and lead to a reduction of costs and power consumption since a smaller FPGA can host more hardware modules due to a temporal partition and configuration in a time sequence. This paper shows an approach using the novel Zynq FPGA architecture from Xilinx. The partial reconfiguration is usable with a Linux realized on the dual core ARM 9 processor. A reconfigurable area provides space for accelerators which can be loaded and updated at runtime.
ISSN:2325-6532
2640-0472
DOI:10.1109/ReConFig.2013.6732279