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High-Performance Polycrystalline-Silicon Nanowire Thin-Film Transistors With Location-Controlled Grain Boundary via Excimer Laser Crystallization

High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) are demonstrated using excimer laser crystallization to control the locations of grain boundaries two-dimensionally. Via the locally increased thickness of the amorphous-silicon (a-Si) film as the seeds, th...

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Bibliographic Details
Published in:IEEE electron device letters 2012-11, Vol.33 (11), p.1562-1564
Main Authors: WANG, Chao-Lung, LEE, I-Che, WU, Chun-Yu, CHOU, Chia-Hsin, YANG, Po-Yu, CHENG, Yu-Ting, CHENG, Huang-Chung
Format: Article
Language:English
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Summary:High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) are demonstrated using excimer laser crystallization to control the locations of grain boundaries two-dimensionally. Via the locally increased thickness of the amorphous-silicon (a-Si) film as the seeds, the cross-shaped grain boundary structures were produced among these thicker a-Si grids. The NW TFTs with one primary grain boundary perpendicular to the channel direction could be therefore fabricated to achieve an excellent field-effect mobility of 346 cm 2 /V · s and an on/off current ratio of 3 × 10 9 . Furthermore, the grain-boundary-location-controlled NW TFTs also exhibited better reliability due to the control of grain boundary locations. This technology is thus promising for applications of low-temperature poly-Si TFTs in system-on-panel and 3-D integrated circuits.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2012.2211857