Voltage and temperature dependence of random telegraph noise in highly scaled HKMG ETSOI nFETs and its impact on logic delay uncertainty

This paper analyzes the extensive variability of random telegraph noise (RTN) responses to gate voltage and temperature in undoped nanoscale nFETs. Using comprehensive RTN measurements to extract the response parameters of >;600 traps, we show that the RTN can induce delay uncertainty in dense lo...

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Bibliographic Details
Main Authors: Miki, H., Yamaoka, M., Frank, D. J., Cheng, K., Park, D., Leobandung, E., Torii, K.
Format: Conference Proceeding
Language:eng ; jpn
Subjects:
Acceleration
Couplings
Delay
FETs
Histograms
Logic gates
Temperature dependence
Online Access:Request full text
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Summary:This paper analyzes the extensive variability of random telegraph noise (RTN) responses to gate voltage and temperature in undoped nanoscale nFETs. Using comprehensive RTN measurements to extract the response parameters of >;600 traps, we show that the RTN can induce delay uncertainty in dense low power (i.e., narrow devices and low V DD ) 14-nm technology that may exceed 50% of the nominal delay.
ISSN:0743-1562
DOI:10.1109/VLSIT.2012.6242499