MARS: Matching-Driven Analog Sizing

This paper presents a new approach for automatic computation of matching constraints for analog sizing. The method automatically analyzes a circuit netlist to generate sizing constraints. These sizing constraints are considered during a subsequent numerical optimization. It is the first method that...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 2012-08, Vol.31 (8), p.1145-1158
Main Authors: Eick, M., Graeb, H. E.
Format: Article
Language:English
Subjects:
Algorithm design and analysis
Analog circuits
Analog integrated circuits
constraint generation
Integrated circuit modeling
Mirrors
Robustness
symmetry detection
Transfer functions
transistor sizing
Transistors
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Summary:This paper presents a new approach for automatic computation of matching constraints for analog sizing. The method automatically analyzes a circuit netlist to generate sizing constraints. These sizing constraints are considered during a subsequent numerical optimization. It is the first method that computes symmetry constraints for sizing, based on the hierarchical structure of the circuit and a qualitative signal flow. As a unique feature, the method is capable of handling multiple signal and feedback paths, leading to multiple symmetry axes. It can be applied to linear and nonlinear circuits and any available sizing algorithm. Experimental results show that the runtime of analog sizing, as well as of result quality, are greatly improved.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2012.2190069