Improved Design and Characterization Method for Very High Speed Bipolar Circuits

An improved design method for high speed bipolar circuits is presented. It uses iso base-collector capacitance curves superposed to the duty cycles plots in the (Ic,Vce) plane. This new optimization way gives the optimum operating region for each transistor of a bipolar circuit to reach the best tra...

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Bibliographic Details
Main Authors: Kasbari, A.-E., Ouslimani, A., Blayac, S., Konczykowska, A.
Format: Conference Proceeding
Language:English
Subjects:
Bipolar transistor circuits
Capacitance
Design methodology
Energy consumption
Frequency domain analysis
Frequency measurement
Logic circuits
Logic design
Switching circuits
Time measurement
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Summary:An improved design method for high speed bipolar circuits is presented. It uses iso base-collector capacitance curves superposed to the duty cycles plots in the (Ic,Vce) plane. This new optimization way gives the optimum operating region for each transistor of a bipolar circuit to reach the best trade-off between the switching speed and the power consumption. Electrical design of emitter-coupled pair, which constitutes the basis of emitter-coupled logic (ECL) circuits, is detailed to explain the design method. Each part of the measurement set-up is characterized in time and frequency domains to improve the measurement method. These improvements have enabled the design and characterization of InP double-heterojunction-bipolar transistor master-slave D-type flip-flop circuits. 40 Gb/s measurement with more than 85% eye-diagram opening validates this method.
DOI:10.1109/GSMM.2008.4534641