An embedded reconfigurable datapath for SoC

In this paper we present the new version of a multi-context reconfigurable datapath called PiCoGA (pipelined configurable gate array). The device provides a clear interface model and can be easily embedded in SoC systems where low power consumption and high computation capability are required. New l...

Full description

Saved in:
Bibliographic Details
Main Authors: Lodi, A., Ciccarelli, L., Mucci, C., Giansante, R., Cappelli, A.
Format: Conference Proceeding
Language:English
Subjects:
CMOS logic circuits
CMOS technology
Computer interfaces
Embedded computing
Energy consumption
Logic design
Logic devices
Power system modeling
Reconfigurable logic
Routing
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In this paper we present the new version of a multi-context reconfigurable datapath called PiCoGA (pipelined configurable gate array). The device provides a clear interface model and can be easily embedded in SoC systems where low power consumption and high computation capability are required. New logic cells and routing architecture have been designed for an efficient implementation of computation-intensive algorithms. The integration of a dedicated control unit for pipeline activity control provides a dataflow computational model which is easy to be integrated in a SoC. The embedded datapath has been designed using a 0.13 /spl mu/m CMOS technology. The implementation of several functions in the datapath achieves an average gate density of 1.3 KGates/mm/sup 2/ for each of the four available contexts.
DOI:10.1109/FCCM.2005.18