Modeling of voltage output charge-pump phase frequency detector in tuning loops

Resonant inverters mostly employ tuning loops based on a phase-locked-loop (PLL) circuit. Some commercially available PLL chips, frequently used in this application, include a voltage output charge-pump phase frequency detector (CP/PFD) rather than well-known current output CP/PFD, which complicates...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2005-06, Vol.52 (6), p.304-307
Main Authors: Karaca, H., Kilinc, S., Yuksel, Y.
Format: Article
Language:English
Subjects:
Charge pumps
Circuit optimization
Circuits
Detectors
Electric potential
Phase error
Phase frequency detector
Phase frequency detectors
Phase locked loops
phase-locked loops (PLLs)
Resistors
Resonant inverters
RLC circuits
Switches
Switching circuits
Tuning
tuning circuits
Voltage
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Summary:Resonant inverters mostly employ tuning loops based on a phase-locked-loop (PLL) circuit. Some commercially available PLL chips, frequently used in this application, include a voltage output charge-pump phase frequency detector (CP/PFD) rather than well-known current output CP/PFD, which complicates the analysis of the loop. We present a new model for voltage output CP/PFD and an analysis of a tuning loop using this model. The proposed model employs the resistance multiplication approach, which is applicable for the circuits containing periodically operated switches. It is shown that a voltage output CP/PFD in conjunction with a simple RC low-pass filter can be modeled using a dc voltage source, a phase error controlled resistor, and a capacitor. The theoretical study is verified by experimental results.
ISSN:1549-7747
1057-7130
1558-3791
DOI:10.1109/TCSII.2005.848953