Accuracy improvement of the "Single Pattern Driver" method for the characterization of interconnect capacitance in the context of nanometer technology development

Characterization, modelling and monitoring of interconnect capacitance are of first interest for CMOS and BiCMOS technology development, especially for circuit delay evaluation. An improvement of the Single Pattern Driver method is proposed in this paper to take into account MOST intrinsic and diode...

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Bibliographic Details
Main Authors: Brut, H., Martin, S., Froment, B.
Format: Conference Proceeding
Language:English
Subjects:
Applied sciences
Capacitance measurement
Circuit testing
CMOS technology
Current measurement
Design. Technologies. Operation analysis. Testing
Diodes
Driver circuits
Electronics
Exact sciences and technology
Integrated circuit interconnections
Integrated circuits
Monitoring
MOS devices
Parasitic capacitance
Semiconductor device modeling
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Testing, measurement, noise and reliability
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Summary:Characterization, modelling and monitoring of interconnect capacitance are of first interest for CMOS and BiCMOS technology development, especially for circuit delay evaluation. An improvement of the Single Pattern Driver method is proposed in this paper to take into account MOST intrinsic and diode leakages which can introduce errors of the order of few hundred aF in advanced nanometer technologies. The accuracy is hugely improved and reaches now 10aF.
DOI:10.1109/ICMTS.2004.1309501