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A Memristor Emulation in 180-nm CMOS Process for Spiking Signal Generation and Chaos Application
We present a new CMOS circuit and its successful fabrication of an operational transconductance amplifier (OTA)-CMOS inverter-based memristor emulator and investigate its switching behavior from 5 MHz to 50 MHz. It could be considered the first memristor emulator based on a current mode circuit and...
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Published in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2024-04, Vol.71 (4), p.1757-1770 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | We present a new CMOS circuit and its successful fabrication of an operational transconductance amplifier (OTA)-CMOS inverter-based memristor emulator and investigate its switching behavior from 5 MHz to 50 MHz. It could be considered the first memristor emulator based on a current mode circuit and an inverter. Primarily, the transconductance of the inverter stage transforms the bias-voltage-dependent transconductance of the OTA into an overall flux-dependent memductance of the memristor. We also demonstrate how performance measures such as frequency response, noise, post-layout simulation, and process corners impact the memristive behavior of the design. The power consumption of the proposed memristor emulator is 2.25 mW. The aforementioned power figure is based on a 1.8 V power supply and calculated on a UMC 180-nm CMOS technology node. Further, using this memristor emulator, we implement a CMOS circuit for spiking signal generation called the Memristive Integrate-and-Fire (MIF) neuron circuit that mimics a biological neuron. As far as we know, a spiking signal generation using a memristor emulator remains unreported. Later on, we went on to realize a MIF neuron based object detection application to bring out the practical significance of the MIF neuron circuit. We have fabricated a chip of the proposed memristor emulator design with the die size of L= 1499.96~\mu \text{m} , W= 1499.96~\mu \text{m} , and included its fabrication result to validate the theoretical derivations in the work. At last, we perform an experimental realization of a chaos circuit application with the help of the fabricated chip. |
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ISSN: | 1549-8328 1558-0806 |
DOI: | 10.1109/TCSI.2023.3348695 |