Gate Driver Design and Device Characterization for 3.3 kV SiC MOSFET Modules

A compact and 25-kV isolated gate driver with various protective features has been implemented for 3.3-kV SiC power modules. The gate driver design procedure for circuit production is described in detail. With the implemented gate driver, double pulse test (DPT) is performed to evaluate the switchin...

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Bibliographic Details
Main Authors: Gutierrez, Bryan, Hou, Zhengming, Jiao, Dong, Hsieh, Hsin-Che, Chen, XingRou, Liao, Hsuan, Lai, Jih-Sheng, Yu, Ming-Hung, Chen, Kuan-Wen
Format: Conference Proceeding
Language:English
Subjects:
Current measurement
double pulse test (DPT)
Energy loss
gate driver
Inductance
medium voltage
MOSFET
Performance evaluation
Silicon carbide
silicon carbide (SiC)
Transducers
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Description
Summary:A compact and 25-kV isolated gate driver with various protective features has been implemented for 3.3-kV SiC power modules. The gate driver design procedure for circuit production is described in detail. With the implemented gate driver, double pulse test (DPT) is performed to evaluate the switching energy losses and parasitic loop inductance at different voltage conditions. Additionally, the DPT together with Ansys Software are used to characterize the stray inductances.
ISSN:2329-3748
DOI:10.1109/ECCE53617.2023.10362206