Work Function Engineering With Linearly Graded Binary Metal Alloy Gate Electrode for Short-Channel SOI MOSFET

Over the last few decades, silicon-on-insulator (SOI) technology has been identified as one possible solution for enhancing the performance of CMOS because of its numerous advantages over conventional bulk CMOS technology. One of the primary drawbacks of short-channel SOI MOSFET is the degradation o...

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Bibliographic Details
Published in:IEEE transactions on nanotechnology 2012-05, Vol.11 (3), p.472-478
Main Authors: Deb, Sanjoy, Singh, N. Basanta, Islam, Nurul, Sarkar, Subir Kumar
Format: Article
Language:English
Subjects:
Analytical models
Applied sciences
Binary metal alloy gate
Condensed matter: electronic structure, electrical, magnetic, and optical properties
Design. Technologies. Operation analysis. Testing
Electric potential
Electrodes
Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures
Electronics
Exact sciences and technology
induced barrier lowering effect
Integrated circuits
Logic gates
Metals
Physics
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
short channel
Silicon
silicon-on-insulator (SOI) MOSFET
Surface double layers, schottky barriers, and work functions
Threshold voltage
Transistors
work function engineering
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Summary:Over the last few decades, silicon-on-insulator (SOI) technology has been identified as one possible solution for enhancing the performance of CMOS because of its numerous advantages over conventional bulk CMOS technology. One of the primary drawbacks of short-channel SOI MOSFET is the degradation of device threshold voltage with decreasing channel length. Drain-induced barrier-lowering (DIBL) effect, generated from high drain bias, is the main cause behind this length-dependent nature of threshold voltage. This "instability" in threshold voltage is responsible for making SOI device design very challenging. The instability that is known as the threshold voltage rolloff restricts further scaling of SOI devices. In this paper, an idea of work function engineering with continuous horizontal mole fraction variation in a binary alloy gate has been proposed and implemented theoretically. Analytical model-based simulation verified that performance of proposed SOI MOSFET is improved as it has higher immunity to DIBL effect.
ISSN:1536-125X
1941-0085
DOI:10.1109/TNANO.2011.2177669