Suppressing limit cycles in digital incremental computers

Suppressing limit cycles in digital incremental computers

This correspondence examines the sources of limit cycle oscillations in Digital Incremental Computers and proposes several different methods for their suppression. A theoretical analysis is performed based on considering the effects of noise injected at the truncation points of the system and the re...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems 1981-07, Vol.28 (7), p.723-730
Main Authors: Witten, I., McCrea, P.
Format: Article
Language:eng
Subjects:
Analytical models
Computational modeling
Computer errors
Difference equations
Digital filters
Hardware
Limit-cycles
Performance analysis
Refining
Transfer functions
Online Access:Get full text
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Summary:This correspondence examines the sources of limit cycle oscillations in Digital Incremental Computers and proposes several different methods for their suppression. A theoretical analysis is performed based on considering the effects of noise injected at the truncation points of the system and the results are verified by extensive simulation.
ISSN:0098-4094
1558-1276