Analysis and Optimization of Temporary Read Errors in 3D NAND Flash Memories

Temporary read errors (TRE) refers to the high temporary fail bit count (FBC) in the first read, when 3D NAND recovers froman idle state. This can seriously deteriorate the Quality of Service (QoS) of 3D NAND Flash-based storage devices. The characteristics and mechanism of the TRE issue of 3D NAND...

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Bibliographic Details
Published in:IEEE electron device letters 2021-06, Vol.42 (6), p.820-823
Main Authors: Xia, Shiyu, Jia, Xinlei, Jin, Lei, Luo, Zhe, Song, Yali, Liu, Chang, Xu, Feng, Li, Kaiwei, Li, Haitao, Li, Da, Wang, Qiguang, Huang, Xueqing, Zhao, Xiangming, Wei, Huazheng, Cao, Hong, Chen, Yi, Duffin, David, Yang, Daohong, Huo, Zongliang
Format: Article
Language:English
Subjects:
3D NAND flash memory
Analytical models
first read phenomenon
Flash memories
GBTs
Grain boundaries
Logic gates
Occupancy
Optimization
Quality of service
temporary read errors
Three-dimensional displays
Threshold voltage
Transient analysis
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Summary:Temporary read errors (TRE) refers to the high temporary fail bit count (FBC) in the first read, when 3D NAND recovers froman idle state. This can seriously deteriorate the Quality of Service (QoS) of 3D NAND Flash-based storage devices. The characteristics and mechanism of the TRE issue of 3D NAND Flash are investigated in this work. Based on the experimental analysis, a physicalmodel is proposed to interpret the physical mechanism of TRE. When 3D NAND array recovers from an idle state, the grain boundary traps (GBTs) discharging during the idle time lead to the low GBTs occupancy, which is responsible for the high temporary FBC in the first read. Based on the physical model, a novel approach to alleviate TRE is proposed and has been validated by experiments.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2021.3073604