A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS

High-rate communications technology leveraging the unlicensed spectrum around 60 GHz is almost ready for deployment with several demonstrations of successful wireless links. One key aspect of the transceiver is the ability to handle analog fractional bandwidths in the order of 20%, challenging for b...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2011-03, Vol.46 (3), p.551-561
Main Authors: Vecchi, F, Bozzola, S, Temporiti, E, Guermandi, D, Pozzoni, M, Repossi, M, Cusmai, M, Decanis, U, Mazzanti, A, Svelto, F
Format: Article
Language:English
Subjects:
Amplifiers
Applied sciences
Bandwidth
Capacitors
Circuit properties
Circuits
CMOS
coupled resonators
Couplings
Design. Technologies. Operation analysis. Testing
dividers
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Frequency filters
Gain
Integrated circuits
integrated noise
Links
low noise amplifiers
millimeter wave receiver
mixer
Mixers
mm-wave
Noise
Oscillators, resonators, synthetizers
Receivers
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
synthesizer
Synthesizers
Wideband
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Summary:High-rate communications technology leveraging the unlicensed spectrum around 60 GHz is almost ready for deployment with several demonstrations of successful wireless links. One key aspect of the transceiver is the ability to handle analog fractional bandwidths in the order of 20%, challenging for both the linear processing chain and the frequency reference generator. In classical LC loaded stages bandwidth trades with gain making them unsuitable for wide band amplifiers at millimeter-waves where the available device gain is relatively low. In this work, we exploit inter-stage coupling realizing higher order filters where wider bandwidth is achieved at the expense of in-band gain ripple only. The receiver adopts a sliding IF architecture employing an integer-N type-II synthesizer, with a three state phase frequency detector charge pump combination, a switched tuned LC VCO followed by a low power wide range divider chain. By judicious choice of charge pump current and filter components integrated phase noise, critical for signal constellation integrity at high rate, is kept low. This paper inspects the inter-stage coupling technique, providing design formulas, and discusses the design of each receiver block. Experiments performed on 65 nm prototypes provide: 6.5 dB maximum noise figure over >;13 GHz bandwidth, -22.5 dBc integrated phase noise while consuming 84 mW.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2010.2100251