Architecture, performance modeling and VLSI implementation methodologies for ASIC vector processors: a case study in telephony workloads

Architecture, performance modeling and VLSI implementation methodologies for ASIC vector processors: a case study in telephony workloads

This research discusses hardware architectures, script-based automation and software and hardware methodologies for developing customized System-on-Chip scalar/vector processors within the example application domain of telephony codes. The approaches researched include Register-Transfer-Level method...

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Bibliographic Details
Main Authors: Vassilios Chouliaras, Konstantia Koutsomyti, Simon R. Parr, David Mulvaney, Mark J. Milward
Format: Default Article
Published: 2013
Subjects:
Mechanical engineering not elsewhere classified
VLSI
Microprocessors
Vector processors
System-on-Chip (SoC)
Electronic System Level (ESL) design
Mechanical Engineering not elsewhere classified
Online Access:https://hdl.handle.net/2134/22466
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https://hdl.handle.net/2134/22466

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