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| 008 | 980318s1998 enk f eng e | ||
| 020 | |a 047198325X | ||
| 089 | |a 621.3819582 | ||
| 100 | 1 | |a Rushton, Andrew | |
| 245 | 1 | 0 | |a VHDL for logic synthesis / |c Andrew Rushton. |
| 250 | |a 2nd ed. | ||
| 260 | |a Chichester : |b Wiley, |c 1998. | ||
| 300 | |a xiii, 375p. : |b ill. (hbk) ; |c 25 cm. | ||
| 500 | |a Previous ed.: London: McGraw-Hill, 1995 | ||
| 504 | |a Bibliography: p.359 | ||
| 504 | |a Includes index | ||
| 650 | 0 | 0 | |a VHDL (Computer hardware description language) |
| 650 | 0 | 0 | |a Logic design |x Data processing |
| 650 | 0 | 0 | |a Computer-aided design |
| 952 | |0 0 |1 0 |4 0 |6 621_381958200000000_RUS |7 0 |9 681167 |a PILKINGTON |b PILKINGTON |c MAIN |d 2004-06-21 |g 40.10 |l 17 |m 9 |o 621.3819582/RUS |p 0402914244 |r 2019-06-23 |s 2018-11-23 |w 2018-02-01 |y LONG | ||
| 999 | |c 418547 |d 418547 | ||
| 942 | 0 | 0 | |0 2 |