VHDL : a logic synthesis approach / David Naylor and Simon Jones. a logic synthesis approach /
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Format: | Book |
Language: | English |
Published: |
London :
Chapman & Hall,
c1997.
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100 | 1 | |a Naylor, David | |
245 | 1 | 0 | |a VHDL : |b a logic synthesis approach / |c David Naylor and Simon Jones. |
260 | |a London : |b Chapman & Hall, |c c1997. | ||
300 | |a x,339p : |b ill ; |c 24cm. | ||
700 | 1 | |a Jones, Simon | |
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